Techy Tuesday - Go Up, Young Man

When real estate in a city is expensive, builders go up; instead of building large one story houses, they build multistory apartment buildings that go vertical.  While society has benefited tremendously from "Moore's Law" in personal electronics for the last half century, with continually shrinking part geometries leading to continually increasing performance, virtually all of the technology has been essentially 2-dimensional.  It's even called planar.  The latest trend in semiconductor memories is to go vertical.

A couple of very big companies in memory components are Intel and Micron Technology.  I'm sure you know Intel; their processors are still the leader in the desktop PC world.  Micron might not be as familiar to you, but has been one of the top few producers of what are called "Flash memories" for quite a while.  Flash memories are found in the familiar USB stick memory modules.

For a couple of years, now, they've been fighting the shrinking geometries required to increase the memory density offered by these parts.  The last generation of parts they used were "20 nanometer geometry"; parts in which features of the transistors are that size (20 nm is 787 billionths of an inch; or 0.787 millionths of an inch).  In one direction only, X or Y, the scale was 16 nm (0.63 millionths).  The new technology uses 32 vertical layers and as a bonus, allows the scale to relax a bit. 

"Our first generation is 32 layers in the vertical direction while relaxing the x-y design rules back several generations."

Prior to going 3D, Micron could only shrink each new generation in its x-y dimensions, but they hit the wall at 20-nanometers, only able to shrink in one direction—either x or y—at the 16-nanometer node. But by going 3D, Micron has been able to keep increasing chip capacity per package while relaxing the x-y scaling rules. Relaxing the x-y design rules improves the performance and reliability compared with sub-20nm planar NAND.

The process is still expensive compared to their conventional 2D process so it will be aimed at high end uses:

In its fabs in Singapore and Lehi, Utah (half-owned by Intel) Micron's first generation 3D NAND chips will be 32- and 48-gigabytes. With up to 16 layers in a single package super high density solid-state drives (SSDs) can be made for servers and data centers. For the future, Micron plans 2-terabyte 3D NAND packages, allowing an SSD using 16 of them to pack up to 32-terabytes.

So how does it work?  Why is nobody else doing it?

The idea is to put a material that increases its resistance whenever current is put through it in one direction, and reduces its resistance when current flows the opposite direction. Many such materials—called memristors by their inventor Chua—have been successfully tested in the lab, from exotics to plain-old silicon dioxide, but no one has been able to perfect the read/write process for mass production—until now.

That link to Wikipedia says memristors were conceptualized in about 1971, so it has taken this long to get them into a commercially viable product.  All of this so you can get more memory in the same size package, and more of the things people want in their smart devices.   

Micron's 3-D NAND die is small enough to boost solid-state SSDs the size of gum sticks to 3.5 terabytes. (Source: Micron)